| LEADER : 00000nam 2200000uu 4500 |
| 008 110921s2010th m 000 0 tha d0 tha d |
| 020 ^a9780470881323
|
| 040 ^aneu
|
| 082 0 ^a621.381^B167C 2010
|
| 100 1 ^aBaker,R.Jacob
|
| 245 10 ^aCMOS:^bCircuit design layout and simulation/^cR.Jacob Baker
|
| 260 ^aHobKen,New Jersey :^bA John wiley & sons, ^cc2010.
|
| 300 ^axxxiii,1173 p. :^bill. ;^c23 cm.
|
| 650 0 ^aMetal oxide semiconductors^xDesign and construction.
|
| 650 0 ^aTransistor-transistor logic circuits^xDesign and construction.
|
| 650 0 ^aIntergrated circuits
|
| 852 ^aElectronics engineering
|
| 999 ^a ^ayuwapha
|
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